Mahesh Kumar, D and Kannusamy, R (2014) A Review on Test Pattern Generation for Low Power Built In Self Test Application. Australian Journal of Basic and Applied Sciences, 8 (15). pp. 77-84. ISSN 1991-8178

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Abstract

Background: Background: Modern manufacturing techniques in IC design are
growing such that the transistor count on a single chip escalates exponentially
with complex Embedded and DSP cores in it. Consequently, testing of such complex
ICs are remarkably challenging. In this paper we consider the implementation of
parallel test patterns generation which is used as a basic building Block in built-in-self
test (BIST) design. It is a well-known fact that test power is several times higher than
functional power. Objective: This paper first gives an overview of the need and
importance of low power testing and the various methods for test pattern generation.
Results: The proposed Test pattern generator (TPG) can drive several circuits under
test (CUT) within a complex VLSI IC and it outperforms the existing counterparts in
providing an efficient and effective way in greatly reducing power consumption, delay
and complexity. A comparison of, newly developed test solutions with respect to key
parameters of low power testing like, test power, delay and so on is presented for
choosing a best possible solution. This proposed method utilizes GBMAC (Galois
field based multiply and accumulate) units, which consist of Galois based Finite field
Multipliers and several accumulators, in DSP to generate test patterns. Conclusion:
Hence the new method can generate test patterns without LFSRs (linear feedback shift
registers) and Multiple Single Input Change (MSIC). Fine review in any research
area is crucial for well again Perceptive of its fundamentals and it also indicates the
trends and scale for potential research in the special area.

Item Type: Article
Uncontrolled Keywords: Built-in-Self-Test (BIST), Test Pattern Generator (TPG), Linear Feed Back Shift Register (LFSR), Multiple Single Input Change (MSIC), GBM.
Divisions: PSG College of Arts and Science > Department of Electronics
Depositing User: Mr Team Mosys
Date Deposited: 19 Dec 2022 05:43
Last Modified: 19 Dec 2022 05:43
URI: http://ir.psgcas.ac.in/id/eprint/1659

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